集成电路中的现代半导体器件（英文版半导体科学与技术） / 国外信息科学与技术优秀图书系列
￥88.00定价
作者： [美]胡正明
出版时间：2012-02
出版社：科学出版社
- 科学出版社
- 9787030326652
- 110496
- 2012-02
- TN303
内容简介
胡正明所著的《集成电路中的现代半导体器件(英文版半导体科学与技术)/国外信息科学与技术优秀图书系列》主要介绍与集成电路相关的主流半导体器件的基本原理，包括PN结二极管、MOsFET器件和双极型晶体管(BJT)，同时介绍了与这些半导体器件相关的集成工艺制造技术。本书作者是美国工程院院士、中国科学院外籍院士，多年从事半导体器件与集成电路领域的前沿性研究工作。本书内容简明扼要，重点突出，深度掌握适宜，讲解深入浅出，理论联系实际。本书可作为微电子及相关专业本科生教材，也可以作为微电子及相关领域工程技术人员的参考书。
目录
Preface
1 Electrons and Holes in Semiconductors
1.1 Silicon Crystal Structure
1.2 Bond Model of Electrons and Holes
1.3 Energy Band Model
1.4 Semiconductors, Insulators, and Conductors
1.5 Electrons and Holes
1.6 Density of States
1.7 Thermal Equilibrium and the Fermi Function
1.8 Electron and Hole Concentrations
1.9 General Theory ofnandp
1.10 Carrier Concentrations at Extremely High and Low Temperatures
1.11 Chapter Summary
PROBLEMS
REFERENCES
GENERAL REFERENCES
2 Motion and Recombination of Electrons and Holes
2.1 Thermal Motion
2.2 Drift
2.3 Diffusion Current
2.4 Relation Between the Energy Diagram and V,%
2.5 Einstein Relationship Between D and u
2.6 Electron-Hole Recombination
2.7 Thermal Generation
2.8 Quasi-Equilibrium and Quasi-Fermi Levels
2.9 Chapter Summary
PROBLEMS
REFERENCES
GENERAL REFERENCES
3 Device Fabrication Technology
3.1 Introduction to Device Fabrication
3.2 Oxidation of Silicon
3.3 Lithography
3.4 Pattern Transfer-Etching
3.5 Doping
3.6 Dopant Diffusion
3.7 Thin-Film Deposition
3.8 Interconnect-The Back-End Process
3.9 Testing, Assembly, and Qualification
3.10 Chapter Summary-A Device Fabrication Example
PROBLEMS
REFERENCES
GENERAL REFERENCES
4 PN and Metal-Semiconductor Junctions
Part 1 PN Junction
4.1 Building Blocks of the PN Junction Theory
4.2 * Depletion-Layer Model
4.3 Reverse-Biased PN Junction
4.4 Capacitance-Voltage Characteristics
4.5 Junction Breakdown
4.6 Carrier Injection Under Forward Bias--Quasi-Equilibrium Boundary Condition
4.7 Current Continuity Equation
4.8 Excess Carriers in Forward-Biased PN Junction
4.9 PN Diode IV Characteristics
4.10 Charge Storage
4.11 Small-Signal Model of the Diode
Part 2 Application to Optoelectronic Devices
4.12 Solar Cells
4.13 Light-Emitting Diodes and Solid-State Lighting
4.14 Diode Lasers
4.15 Photodiodes
Part Ⅲ: Metal-Semiconductor Junction
4.16 Schottky Barriers
4.17 Thermionic Emission Theory
4.18 Schottky Diodes
4.19 Applications of Schottky Diodes
4.20 Quantum Mechanical Tunneling
4.21 Ohmic Contacts
4.22 Chapter Summary
PROBLEMS
REFERENCES
GENERAL REFERENCES
5 MOS Capa
5.1 Flat-Band Condition and Flat-Band Voltage
5.2 Surface Accumulation
5.3 Surface Depletion
5.4 Threshold Condition and Threshold Voltage
5.5 Strong Inversion Beyond Threshold
5.6 MOS C-V Characteristics
5.7 Oxide Charge--A Modification to Vfband Vt
5.8 Poly-Si Gate Depletion--Effective Increase in Tox
5.9 Inversion and Accumulation Charge-Layer Th
and Quantum Mechanical Effect
5.1 0CCD Imager and CMOS Imager
5.1 1Chapter Summary
PRO
REFERENCES
GENERAL REFERENCES
6 MOS Trans
6.1 Introduction to the M
6.2 Complementary MOS (CMOS) Techn
6.3 Surface Mobilities and High-Mobility
6.4 MOSFET Vt, Body Effect, and Steep Retrograde Doping
6.5 QINVin M
6.6 Basic MOSFETIV Model
6.7 CMOS Inverter--A Circuit Example
6.8 Velocity Saturation
6.9 MOSFET IV Model with Velocity Saturation
6.1 0Parasitic Source-Drain Resistance
6.1 1 * Extraction of the Series Resistance and the Effective Channel Length
6.1 2Velocity Overshoot and Source Velocity Limit
6.1 3Output Conductance
6.1 4 * High-Frequency Performance
6.1 5 = MOSFET Noises
6.1 6SRAM, DRAM, Nonvolatile (Flash) Memory Devices
6.1 7Chapter Summary
PROBLEMS
REFERENCES
GENERAL REFERENCES
7 MOSFETs in ICs-Scaling, Leakage, and Other T
7.1 Technology Scaling--For Cost, Speed, and Power Consumption
7.2 Subthreshold Current--"Off" Is Not Totally"Off"
7.3 * Vt Roll-Off--Short-Channel MOSFETs Leak
7.4 = Reducing Gate-Insulator Electrical Thickness and Tunneling Leakage
7.5 How to Reduce Wdep
7.6 Shallow Junction and Metal SourceDrain MOSFET
7.7 Trade-Off Betweenon andoff and Design for Manufacturing
7.8 Ultra-Thin-Body SOl and Multigate MOSFETs
7.9 Output Conductance
7.10 Device and Process Simulation
7.11 MOSFET Compact Model for Circuit Simulation
7.12 Chapter Summary
PROBLEMS
REFERENCES
GENERAL REFERENCES
8 Bipolar Trans
8.1 Introduction to the BJT
8.2 Collector Current
8.3 Base Current
8.4 * Current Gain
8.5 Base-Width Modulation by Collector Voltage
8.6 Ebers-Moll Model
8.7 Transit Time and Charge Storage
8.8 Small-Signal Model
8.9 Cutoff Frequency
8.10 Charge Control Model
8.11 Model for Large-Signal Circuit Simulation
8.12 Chapter Summary
PROBLEMS
REFERENCES
GENERAL REFERENCES
Appendix Ⅰ
Derivation of the Density of States
Appendix Ⅱ
Derivation of the Fermi-Dirac Distribution
Appendix Ⅲ
Self-Consistencies of Minority Carrier As
Answers to Selected Problems
Index
1 Electrons and Holes in Semiconductors
1.1 Silicon Crystal Structure
1.2 Bond Model of Electrons and Holes
1.3 Energy Band Model
1.4 Semiconductors, Insulators, and Conductors
1.5 Electrons and Holes
1.6 Density of States
1.7 Thermal Equilibrium and the Fermi Function
1.8 Electron and Hole Concentrations
1.9 General Theory ofnandp
1.10 Carrier Concentrations at Extremely High and Low Temperatures
1.11 Chapter Summary
PROBLEMS
REFERENCES
GENERAL REFERENCES
2 Motion and Recombination of Electrons and Holes
2.1 Thermal Motion
2.2 Drift
2.3 Diffusion Current
2.4 Relation Between the Energy Diagram and V,%
2.5 Einstein Relationship Between D and u
2.6 Electron-Hole Recombination
2.7 Thermal Generation
2.8 Quasi-Equilibrium and Quasi-Fermi Levels
2.9 Chapter Summary
PROBLEMS
REFERENCES
GENERAL REFERENCES
3 Device Fabrication Technology
3.1 Introduction to Device Fabrication
3.2 Oxidation of Silicon
3.3 Lithography
3.4 Pattern Transfer-Etching
3.5 Doping
3.6 Dopant Diffusion
3.7 Thin-Film Deposition
3.8 Interconnect-The Back-End Process
3.9 Testing, Assembly, and Qualification
3.10 Chapter Summary-A Device Fabrication Example
PROBLEMS
REFERENCES
GENERAL REFERENCES
4 PN and Metal-Semiconductor Junctions
Part 1 PN Junction
4.1 Building Blocks of the PN Junction Theory
4.2 * Depletion-Layer Model
4.3 Reverse-Biased PN Junction
4.4 Capacitance-Voltage Characteristics
4.5 Junction Breakdown
4.6 Carrier Injection Under Forward Bias--Quasi-Equilibrium Boundary Condition
4.7 Current Continuity Equation
4.8 Excess Carriers in Forward-Biased PN Junction
4.9 PN Diode IV Characteristics
4.10 Charge Storage
4.11 Small-Signal Model of the Diode
Part 2 Application to Optoelectronic Devices
4.12 Solar Cells
4.13 Light-Emitting Diodes and Solid-State Lighting
4.14 Diode Lasers
4.15 Photodiodes
Part Ⅲ: Metal-Semiconductor Junction
4.16 Schottky Barriers
4.17 Thermionic Emission Theory
4.18 Schottky Diodes
4.19 Applications of Schottky Diodes
4.20 Quantum Mechanical Tunneling
4.21 Ohmic Contacts
4.22 Chapter Summary
PROBLEMS
REFERENCES
GENERAL REFERENCES
5 MOS Capa
5.1 Flat-Band Condition and Flat-Band Voltage
5.2 Surface Accumulation
5.3 Surface Depletion
5.4 Threshold Condition and Threshold Voltage
5.5 Strong Inversion Beyond Threshold
5.6 MOS C-V Characteristics
5.7 Oxide Charge--A Modification to Vfband Vt
5.8 Poly-Si Gate Depletion--Effective Increase in Tox
5.9 Inversion and Accumulation Charge-Layer Th
and Quantum Mechanical Effect
5.1 0CCD Imager and CMOS Imager
5.1 1Chapter Summary
PRO
REFERENCES
GENERAL REFERENCES
6 MOS Trans
6.1 Introduction to the M
6.2 Complementary MOS (CMOS) Techn
6.3 Surface Mobilities and High-Mobility
6.4 MOSFET Vt, Body Effect, and Steep Retrograde Doping
6.5 QINVin M
6.6 Basic MOSFETIV Model
6.7 CMOS Inverter--A Circuit Example
6.8 Velocity Saturation
6.9 MOSFET IV Model with Velocity Saturation
6.1 0Parasitic Source-Drain Resistance
6.1 1 * Extraction of the Series Resistance and the Effective Channel Length
6.1 2Velocity Overshoot and Source Velocity Limit
6.1 3Output Conductance
6.1 4 * High-Frequency Performance
6.1 5 = MOSFET Noises
6.1 6SRAM, DRAM, Nonvolatile (Flash) Memory Devices
6.1 7Chapter Summary
PROBLEMS
REFERENCES
GENERAL REFERENCES
7 MOSFETs in ICs-Scaling, Leakage, and Other T
7.1 Technology Scaling--For Cost, Speed, and Power Consumption
7.2 Subthreshold Current--"Off" Is Not Totally"Off"
7.3 * Vt Roll-Off--Short-Channel MOSFETs Leak
7.4 = Reducing Gate-Insulator Electrical Thickness and Tunneling Leakage
7.5 How to Reduce Wdep
7.6 Shallow Junction and Metal SourceDrain MOSFET
7.7 Trade-Off Betweenon andoff and Design for Manufacturing
7.8 Ultra-Thin-Body SOl and Multigate MOSFETs
7.9 Output Conductance
7.10 Device and Process Simulation
7.11 MOSFET Compact Model for Circuit Simulation
7.12 Chapter Summary
PROBLEMS
REFERENCES
GENERAL REFERENCES
8 Bipolar Trans
8.1 Introduction to the BJT
8.2 Collector Current
8.3 Base Current
8.4 * Current Gain
8.5 Base-Width Modulation by Collector Voltage
8.6 Ebers-Moll Model
8.7 Transit Time and Charge Storage
8.8 Small-Signal Model
8.9 Cutoff Frequency
8.10 Charge Control Model
8.11 Model for Large-Signal Circuit Simulation
8.12 Chapter Summary
PROBLEMS
REFERENCES
GENERAL REFERENCES
Appendix Ⅰ
Derivation of the Density of States
Appendix Ⅱ
Derivation of the Fermi-Dirac Distribution
Appendix Ⅲ
Self-Consistencies of Minority Carrier As
Answers to Selected Problems
Index
