Chapter 1?Semiconductor Diodes__eol__1.1?Introduction__eol__1.2?Semiconductor Materials: Ge, Si, and GaAs__eol__1.3?Covalent Bonding and Intrinsic Materials__eol__1.4?Extrinsic Materials: n-Type and p-Type Materials__eol__1.5?Semiconductor Diode__eol__1.6?Ideal versus Practical__eol__1.7?Resistance Levels__eol__1.8?Diode Equivalent Circuits__eol__1.9?Transition and Diffusion Capacitance__eol__1.10?Reverse Recovery Time__eol__1.11?Diode Specification Sheets__eol__1.12?Semiconductor Diode Notation__eol__1.13?Zener Diodes__eol__1.14?Light-Emitting Diodes__eol__1.15?Summary__eol__1.16?Computer Analysis__eol__Problems__eol__Chapter 2?Diode Applications__eol__2.1?Introduction__eol__2.2?Load-Line Analysis__eol__2.3?Equivalent Model Analysis__eol__2.4?AND/OR Gates__eol__2.5?Sinusoidal Inputs, Half-Wave Rectification__eol__2.6?Full-Wave Rectification__eol__2.7?Clippers__eol__2.8?Clampers__eol__2.9?Zener Diodes__eol__2.10?Summary__eol__Problems__eol__Chapter 3?Bipolar Junction Transistors__eol__3.1?Introduction__eol__3.2?Transistor Construction__eol__3.3?Transistor Operation__eol__3.4?Common-Base Configuration__eol__3.5?Transistor Amplifying Action__eol__3.6?Common-Emitter Configuration__eol__3.7?Common-Collector Configuration__eol__3.8?Limits of Operation__eol__3.9?Transistor Specification Sheet__eol__3.10?Transistor Casing and Terminal Identification__eol__3.11?Summary__eol__Problems__eol__Chapter 4?DC Biasing —BJTs__eol__4.1?Introduction__eol__4.2?Operating Point__eol__4.3?Fixed-Bias Circuit__eol__4.4?Emitter Bias__eol__4.5?Voltage-Divider Bias__eol__4.6?DC Bias with Voltage Feedback__eol__4.7?Miscellaneous Bias Configurations__eol__4.8?Transistor Switching Networks__eol__4.9?pnp Transistors__eol__4.10?Bias Stabilization__eol__4.11?Summary__eol__Problems__eol__Chapter 5?BJT AC Analysis__eol__5.1?Introduction__eol__5.2?Amplification in the AC Domain__eol__5.3?BJT Transistor Modeling__eol__5.4?The re Transistor Model__eol__5.5?The Hybrid Equivalent Model__eol__5.6?Hybrid π Model__eol__5.7?Variations of Transistor Parameters__eol__5.8?Common-Emitter Fixed-Bias Configuration__eol__5.9?Voltage-Divider Bias__eol__5.10?CE Emitter-Bias Configuration__eol__5.11?Emitter-Follower Configuration__eol__5.12?Common-Base Configuration__eol__5.13?Collector Feedback Configuration__eol__5.14?Collector DC Feedback Configuration__eol__5.15?Determining the Current Gain__eol__5.16?Effect of RL and Rs__eol__5.17?Two-Port Systems Approach__eol__5.18?Summary Table__eol__5.19?Cascaded Systems__eol__5.20?Darlington Connection__eol__5.21?Feedback Pair__eol__5.22?Current Mirror Circuits__eol__5.23?Current Source Circuits__eol__5.24?Approximate Hybrid Equivalent Circuit__eol__5.25?Summary__eol__Problems__eol__Chapter 6?Field-Effect Transistors__eol__6.1?Introduction__eol__6.2?Construction and Characteristics of JFETs__eol__6.3?Transfer Characteristics__eol__6.4?Specification Sheets (JFETs)__eol__6.5?Important Relationships__eol__6.6?Depletion-Type MOSFETs__eol__6.7?Enhancement-Type MOSFETs__eol__6.8?CMOS__eol__6.9?Summary Table__eol__6.10?Summary__eol__Problems__eol__Chapter 7?FET Biasing__eol__7.1?Introduction__eol__7.2?Fixed-Bias Configuration__eol__7.3?Self-Bias Configuration__eol__7.4?Voltage-Divider Biasing__eol__7.5?Depletion-Type MOSFETs__eol__7.6?Enhancement-Type MOSFETs__eol__7.7?Summary Table__eol__7.8?Combination Networks__eol__7.9?p-Channel FETs__eol__7.10?Summary__eol__Problems__eol__Chapter 8?FET Amplifiers__eol__8.1?Introduction__eol__8.2?FET Small-Signal Model__eol__8.3?JFET Fixed-Bias Configuration__eol__8.4?JFET Self-Bias Configuration__eol__8.5?JFET Voltage-Divider Configuration__eol__8.6?JFET Source-Follower (Common-Drain) Configuration__eol__8.7?JFET Common-Gate Configuration__eol__8.8?Depletion-Type MOSFETs__eol__8.9?Enhancement-Type MOSFETs__eol__8.10?E-MOSFET Drain-Feedback Configuration__eol__8.11?E-MOSFET Voltage-Divider Configuration__eol__8.12?Summary Table__eol__8.13?Effect of RL and Rsig__eol__8.14?Cascade Configuration__eol__8.15?Su